The present invention relates to laminate circuit structures, and more particularly to composite laminate circuit structures constructed from a plurality of modularized circuitized voltage plane subassemblies bonded together. The present invention also relates to a method for fabricating the laminate circuit structures. The present invention provides for planar, fine line external circuit flat lines and does not require an additional adhesive sheet nor glass cloth reinforcement.
A conventional technique of forming a laminate circuit board structures includes forming layers of dielectric material and electrically conducting material to provide multiple layers of circuits and voltage planes. Voltage planes can be either ground plane or power planes, and are sometimes collectively referred to as power planes.
Conventional printed circuit boards are typically constructed from glass cloth prepreg and copper. Normally copper clad laminates (CCL""s) are circuitized and then xe2x80x9claid upxe2x80x9d with other circuitized cores and additional sticker prepreg to form composites. Once laminated, conventional composite boards are drilled and then plated. While conventional boards can be either tri-plate or strip line constructions, both use conventional prepreg as sticker sheets. Both designs, especially stripline/buried via designs, also usually utilize signal to power plane referencing through the sticker sheet layer, on at least one side of the signal line.
Composites constructed using 2S1P building blocks offer a number of advantages over conventional construction techniques. One of these advantages is testable impedance prior to composite lamination. The impedance is also predominately controlled by the core dielectric. This is a major advantage as core layer dielectrics are not effected by the complex geometries and fill requirements that occur at composite lamination. 2S1P""s built with glass cloth free materials facilitate very high circuit density by allowing very small, laser drilled holes to be made. One very important aspect of using 2S1P""s to build high density composite printed circuit boards (PCBs) is the method used to adhere the 2S1P""s into a composite board.
Prior methods of making 2S1P cores involve drilling or etching clearance holes in bare sheets, e.g., 2 oz., 1 oz. and/or 0.5 oz., copper and then laminating and fully curing these with conventional prepregs or coated foils to produce a core that could be circuitized forming the signal planes. Likewise, prior 0S1P""s have been fabricated in similar manners. These methods are difficult to practice due to the problems associated with handling bare copper. 2S1P""s can also be made by circuitizing one side of a core with the power pattern then relaminating additional prepreg or coated copper over the circuitized power pattern.
Regardless of the method used to make the 2S1P cores, they must now be stuck together using additional xe2x80x9cstickerxe2x80x9d materials placed between the 2S1P""s and the 0S1P""s. These additional sticker sheets contribute additional thickness and exacerbate all the problems associated with additional thickness.
More recently, techniques have been provided that provide a relatively inexpensive photolithographic technique of forming a composite laminate structure from individual discrete laminate structures into a composite laminate structure. Along these lines see U.S. application Ser. No. 09/203,945 entitled xe2x80x9cTwo Signal One Power Plane Circuit Board,xe2x80x9d Ser. No. 09/203,978 entitled xe2x80x9cMulti-Layer Organic Chip Carrier Packagexe2x80x9d and Ser. No. 09/204,458 entitled xe2x80x9cComposite Laminate Circuit and Method of Forming the Same,xe2x80x9d entire disclosures of which are incorporated herein by reference.
Although the structures and methods of these inventions provide significant advances and advantages over current printed wire board (PWB) fabrication methods, there still exists a need for further refinement. Therefore continuing efforts are underway in attempting to provide for even greater advantages.
The present invention makes possible thinner laminate circuit structures, and therefore making possible higher density PCBs with fewer processing steps. The subject invention teaches new ways to form 2S1P and 0S1P components using novel methods, some of which also simplify or solve problems of how to adhere these components together into a composite, in some cases without the corresponding increase in composite thickness necessitated by the prior art.
In addition, the structures of the present invention do not require glass cloth reinforcement.
The present invention improves and simplifies the process for customizing the power planes as well as opening up numerous new possibilities in methods to construct the component cores.
The present invention comprises novel ways for adhering together the subassemblies.
The 2S1P and 0S1P structures taught by the present invention each comprise two basic variations. Methods 1, 3, and 5 disclosed below describe how to build 2S1P structures without via holes. 0S1P methods 1 through 4 disclosed below each describe methods of building 0S1P structures each with an option to form conductive holes through the structure. 2S1P methods 1, 3, and 5 and all of the 0S1P methods disclosed below without the conductive hole option exercised are intended for use in composites in which the electrical interconnection scheme will be by conventional composite through hole drilling and plating, thus the conductive pathways will be formed at the composite level. Therefore no need exists for drilling and plating or drilling and filling vias or through holes at the sub component level. 2S1P options 2, 4, and 6 and all of the 0S1P options disclosed below in which the optional through holes have been formed are intended for use in composites in which advanced non-conventional interconnect methods will be employed. Some of these methods include, stacked holes filled with conductive adhesive, stacked dendrite contact, or metal to metal joining.
More particularly, the laminate circuit structure assembly of the present invention comprises at least two modularized circuitized voltage plane subassemblies wherein each of the subassemblies comprise at least two signal planes disposed about an internal voltage plane. Dielectric material is located between the signal and voltage planes. Dielectric is also present on each external surface of each signal plane.
The subassemblies are bonded together into composites with the same dielectric compositions which are used to construct the subassemblies. This is a strategically important part of the invention. For the purposes of physically bonding the 2S1P and 0S1P assemblies no unique adhesives need be used. Additional process steps, (not shown), will be needed to effect electrical interconnection between the vias. For instance, if stacked vias filled with conductive adhesive is the chosen method of interconnection, then each time a 2S1P via is filled or a 0S1P through hole is filled, they will need to be filled with a conductive adhesive instead of the standard dielectrics as described herein. If stacked dendrites, stacked solder connections or stacked liquid phase metal joining are to be used then filling with the dielectric materials as described is acceptable. These aspects are not discussed at length or detail in this application since alterations necessary to the adopt the described electrical interconnection methods will be apparent to those skilled in the art.
Optionally, an interposer can be located between each of the subassemblies and the cured dielectric wherein the interposer comprises dielectric layers disposed about an internal electrically conductive layer.
The present invention also relates to a method for fabricating a laminate circuit structure assembly. The method comprises providing at least two modularized circuitized voltage plane subassemblies wherein each of the subassemblies comprise at least two signal planes disposed about an internal voltage plane. The signal planes each have an external surface and an internal surface. Dielectric material is located between the signal and voltage planes. At least one via is disposed within each subassembly for providing electrical communication between the signal planes and electrical connection to another of the subassemblies. Dielectric is also provided on each external surface of each signal plane.
An uncured or partially cured curable dielectric composition is located between the subassemblies. The dielectric composition may comprise, various thermosetting resins such as BT epoxy, (bismaleimide-triazine/epoxy blends), difunctional or multifunctional epoxies, cyanate ester resins, polyimide resins, allyated PPO, (polyphenylene ether oxide resins), or cross linked butadiene rubber, or, optionally, various thermoplastic resins such as thermoplastic polyimides, various fluoroploymers, or PPO.
Optionally, an interposer can be located between the subassemblies wherein the interposer comprises dielectric layers are disposed about an internal electrically conductive layer.
The structure is then laminated to cause bonding of the interposer to the subassemblies.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.